Surface discharge type plasma display panel divided into a plurality of sub-screens

ABSTRACT

A surface-discharge type PDP includes plural electrode pairs formed of first and second sustain electrodes arranged on a first substrate. Each pair extends along a line direction, and the first and second sustain electrodes are in parallel and adjacent to each other. Plural address electrodes arranged on a second substrate opposing the first substrate via a discharge space, each extending along a row direction, a matrix corresponding to a screen to be displayed is formed with the main electrodes and address electrodes, the address electrodes are orthogonal to the main electrodes, each of the address electrode is divided into, for example two partial address electrodes separated from each other by a border line located between adjacent main electrode pairs, whereby the screen is divided into two partial screens, wherein a first clearance between the partial address electrodes is substantially larger than a second clearance between main electrode pair adjacent across the border line. The arrangement order of the first and second sustain electrodes may preferably be such that first sustain electrodes of the first and second partial screens face each other via the border line, and the partial address electrodes may not cross over the first sustain electrodes nearest to the border line.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to an AC type plasma display panel, referred tohereinafter as a PDP, of matrix formation, particularly to a PDP havinga screen which is divided into a plurality of sub-screens.

2. Description of the Related Arts

A prior art surface discharge type PDP is hereinafter described withreference to FIG. 1 schematically illustrating a plan view of theelectrode configuration, and FIG. 2 schematically illustrating adecomposition perspective view of the internal structure.

Prior art PDP 80 includes a plurality of electrode pairs 12j of firstand second sustain electrodes Xj & Yj in parallel with each other andextending straight, both of which may be called main electrodes, and aplurality of address electrodes Aj in straight and orthogonal to firstand second sustain electrodes Xj & Yj. Each electrode pair 12jcorresponds to a single line of the matrix formation, and each addresselectrode Aj corresponds to a single row. That is, an area E1 where thesustain electrodes and the address electrodes intersect each other is adisplaying area, referred to hereinafter as a screen. In the peripheryof the screen is provided a non-lighting area E2 of a predeterminedwidth in order to be free from an effect of a gas degased from sealantto seal the two glass substrates 11j and 21j.

As shown in FIG. 2, a prior art PDP 80 is constituted with a front glasssubstrate 11j, first and second sustain electrodes Xj & Yj, a dielectriclayer 17j for an AC drive, a protection layer 18j, a back glasssubstrate 21j, address electrodes Aj, separator walls 29j andfluorescent material layers 28j for a full-color display. A dischargespace 30j therein is divided into each subpixel EU along a linedirection, that is, a direction along which sustain electrodes Xj & Yjextend, by separator wall 29j, which also determines a gap between thesubstrates.

First and second sustain electrodes Xj & Yj are arranged on an innersurface of back glass substrate 21j, and each of which is formed of awide transparent electrically conductive film 41j and a metal film 42jthereon for securing a good electrical conductivity. Transparentelectrically conductive film 41j is patterned belt-like wider than metalfilm 42j so that a surface discharge may expand.

Fluorescent material layer 28j is coated between each separator wall 29jon back glass substrate 21j in order to reduce an ion bombardment, andemits a light by a local excitation of ultraviolet rays generated in thesurface discharge. Among the visible radiations emitted from the surfaceof fluorescent layer 28j, i.e. the surface to face the discharge space,the light which can penetrate through glass substrate 11j becomes adisplay light.

Pixel, i.e. picture element, EG of the screen matrix includes threesub-pixels EU which line up along the line direction, where the lightingcolors of the three sub-pixels EU are mutually different as denoted withR, G and B, so that each color to be displayed of a single pixel isdetermined by the combination of the basic R, G and B. The patternarrangement of separator walls 29j is so-called a stripe pattern, wherethe part which corresponds to each row in discharge space 30 extends inthe row direction continuously to cross over all the lines. The emittingcolor of sub-pixels EU in each row is identical.

Second sustain electrode Yj of the electrode pair 12j and addresselectrode Aj are used for selecting, i.e. addressing, a pixel EU tolight or not to light. That is, a screen scanning is performedsequentially line by line by applying a scan pulse onto sequential oneof n second sustain electrodes Yj, where n indicates the quantity of thelines, and a predetermined electrically charged state is formed in theselected cell of each row by an opposing discharge, i.e. an addressdischarge, generated between the second sustain electrode Yj and anaddress electrode Aj selected in accordance with the contents to bedisplayed. After the addressing operation is thus performed, upon anapplication of the sustain pulses of a predetermined peak valuealternately onto first and second sustain electrodes Xj & Yj a surfacedischarge, i.e. a sustain discharge, takes place in the cell in whichwall charges of a predetermined amount remaining at the end of theaddressing operation.

In performing the addressing operation according to the above-describedline-scanning, if the quantity of the lines are increased so as to meeta requirement to enhance the screen size or to accomplish a higherresolution, the period required for the addressing operation becomeslonger. However, a single frame, that is a period for displaying asingle picture, is unalterable. Accordingly, the longer the addressingperiod becomes, the shorter the time length allocatable to the sustainperiod becomes, resulting in inadequate brightness of the display.Moreover, the gradation display by dividing the frame become difficult.

Therefore, it has been measured to divide screen E1 along the rowdirection, that is, along upper and lower direction of FIG. 1 intoplural partial screens in each of which the addressing operation isconcurrently performed. Then, address electrodes Aj are divided intoeach partial screen too. Dividing of the display screen into two partialscreens allows the period required for the addressing operation toreduce to a half.

However, in dividing all the sustain electrode pairs simply into twopartial screens, there is a problem in that an erroneous discharge maytake place across the border line where the second sustain electrode Yof the first sub-screen E11 faces the first sustain electrodes of thenext line of the next partial screen E12.

This problem is hereinafter described in detail with reference to FIGS.3A and 3B. FIG. 3B schematically illustrates a cross-sectional view ofthe electrode structure cut along b—b of FIG. 3A. Display screen E1 isdivided into two partial screens E11 and E12. In each of partial screensE11 and E12 are provided partial address electrodes A1j and A2j,respectively, symmetric with respect to the border line DL. However, inpractically sealing the two glass substrates the symmetry may besomewhat deviated. Clearance Dj between two partial address electrodesA1j and A2j respectively of first and second partial screens E11 and E12is chosen narrower than the electrode clearance d between two lines.This is in order to keep properly the positional relation between secondsustain electrode Y and partial address electrode A, even in the casewhere the symmetry is deteriorated due to a miss-alignment of the facingtwo glass substrates during the sealing operation, that is, the end offirst partial address electrode A1 can always cross over the last secondsustain electrode Yn, so that an address discharge can certainly takeplace between first partial address electrode A1 and the last secondsustain electrode Yn of the first partial screen.

However, in the case where addressing operation is performedconcurrently for two partial screens E11 and E12, when addressingdischarge is generated only in one of the partial screens there isgenerated a potential different between two partial address electrodesA1jn and A2jn. Accordingly, the narrower the clearance Dj is, the morelikely an erroneous discharge, or an interference, generates between twopartial address electrodes A1j and A2j or between a second sustainelectrode Yjn and a second partial address electrode A2jn+1 of secondpartial screen.

SUMMARY OF THE INVENTION

It is a general object of the invention to prevent an erroneousdischarge, i.e. an interference, across a border line of the dividedscreens in attempting a high speed addressing operation by dividing ascreen.

A surface-discharge type plasma display panel includes: a plurality ofmain electrode pairs formed of first and second sustain electrodesarranged upon a first substrate, each extending along a line direction,the first and second sustain electrodes are in parallel and adjacent toeach other. The display panel further includes a plurality of addresselectrodes arranged upon a second substrate opposing the first substratevia a discharge space, each extending along a row direction, a matrixcorresponding to a screen to be displayed is formed with the mainelectrodes and address electrodes, the address electrodes are orthogonalto the main electrodes, each of the address electrode is divided into,for example two partial address electrodes separated from each other bya border line located between adjacent main electrode pairs, whereby thescreen is divided into two partial screens, wherein a first clearancebetween the partial address electrodes is substantially larger than asecond clearance between main electrode pair adjacent across the borderline. The arrangement order of the first and second sustain electrodesmay preferably be such that first sustain electrodes of the first andsecond partial screens face each other via the border line, and thepartial address electrodes may not cross over the first sustainelectrodes nearest may not cross over the first sustain electrodesnearest to the border line.

The above-mentioned features and advantages of the present invention,together with other objects and advantages, which will become apparent,will be more fully described hereinafter, with references being made tothe accompanying drawings which form a part hereof, wherein likenumerals refer to like parts throughout.

A BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 schematically illustrates an electrode configuration of a priorart PDP;

FIG. 2 schematically illustrates a decomposition perspective view of theprior art PDP;

FIGS. 3A and 3B schematically illustrate an electrode configuration anda cross-sectional view of the electrode structure of the prior art PDPhaving two partial screens;

FIG. 4 schematically illustrates an electrode configuration of theelectrode structure of a first preferred embodiment of the presentinvention, having two partial screens;

FIG. 5 schematically illustrates a cross-sectional view of the electrodestructure of the first preferred embodiment of the present invention;

FIG. 6 schematically illustrates a timing chart of voltages applied tothe PDP of the present invention; and

FIG. 7 schematically illustrates a cross-sectional view of the electrodestructure of the second preferred embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment of the present invention is hereinafter describedwith reference to FIG. 4 schematically illustrating electrodeconfiguration of a PDP, and FIG. 5 schematically illustrates across-sectional cut view of a PDP of the present invention.

PDP 4 is a surface discharge type PDP in which a single line is formedof a pair of first and second sustain electrodes X and Y, each inparallel and straight. The screen E1 is divided into two partialscreens, that is first partial screen E11 and a second partial screenE12, in the row direction. The quantity of lines of the entire screen E1is 2n, where the quantity of lines of each partial screen E11 and E12 isn. On each row of first partial screen E11 is provided with a firstpartial address electrode A1, and on each row of second partial screenE12 is provided with a second partial address electrode A1. A singlepair of first and second address electrodes A1 and A2 aligned along asingle row forms a single address electrode A which corresponds to thesingle row. First address electrodes A1 are led out to a first side atfirst ends of the address electrodes, and second address electrodes A2are led out to a second side, opposite from the first side, at secondends of the address electrodes. First sustain electrodes X are led outto a first side of first glass substrate 11 at first ends of the lines,and second sustain electrodes Y are led out to a second side oppositefrom the first side.

Totally 2n first sustain electrodes X and totally 2n second sustainelectrodes Y are arranged along the row direction symmetrically withrespect to the border line DL of first partial screen E11 and secondpartial screen E12 so that Xn-th and Xn+1 the first sustain electrodesXn and Xn+1 are facing each other across the border line DL. In otherwords, in the first partial screen E11 are alternately arranged secondand first sustain electrodes Y and X from the top of the first partialscreen to the border line in the order of Y1, X1 . . . Xn−1, Yn−1, Xn;while in the second partial screen E12 are alternately arranged firstand second sustain electrodes X and Y from the border line DL to thebottom of the second partial screen in the order of Xn+1, Yn+1 . . . X2nand Y2n, where the order is opposite to that in the first partial screenE1. Each of first address electrodes A1 in first partial screen E11crosses over all of n second sustain electrodes Y1−Yn and all of (n−1),first sustain electrodes X1−Xn−1 excluding the last one Xn adjacent tothe border line DL. In the similar way, each of second addresselectrodes A2 in second partial screen E12 cross over all of n secondsustain electrodes Yn+1−Y2n and all of (n−1) first sustain electrodesXn+2−X2n excluding the first one Xn+1 adjacent to the border line DL.

First and second sustain electrodes X and Y are arranged on an innersurface of front glass substrate 11, and respectively formed of atransparent electrically conductive film 41 and a metal film 42 thereonas shown in FIG. 5. Upon a dielectric layer 17 covering first and secondsustain electrodes X and Y is vapor-deposited a protection layer 18formed of MgO, magnesium oxide. First and second partial addresselectrodes A1 and A2 are arranged on an inner surface of back glasssubstrate 21 and is coated with an insulating layer 24. Upon insulatinglayer 24 are provided separator walls, which is not shown in the figure,and a fluorescent material layer 28. Each separator wall separatesdischarge space 30 into each subpixel along the line direction, and alsoacts to keep the height of the discharge space 30 uniform. The separatorwall structure and the layout pattern of the fluorescent material layerof PDP 1 are identical to those of the prior art structure shown in FIG.3.

In performing the display, the addressing operation is first carried outby generating a discharge in a direction along the thickness of theglass substrates, referred to hereinafter as an opposing discharge,between second sustain electrode Y and first partial address electrodeA1 in first partial screen E11, and between second sustain electrode Y2and second partial address electrode A in second partial screen E12.

A clearance D between first partial address electrode A1 of firstpartial screen E11 and second partial address electrode A2 of secondpartial screen E12 is chosen longer than the sum of twice of the width wof first sustain electrode X and a clearance d, typically 430 μm,between two first sustain electrodes Xn & Xn+1 across the border lineDL, and shorter than a clearance dy between two nearest second sustainelectrodes Yn & Yn+1 across the border line DL, that is2w+d<D<2w+d+2g=dy, where g indicates a clearance between the pairedfirst and second sustain electrodes X and Y. These dimensionalconditions are such that clearance D between address electrodes A1 & A2,respectively of the first and second partial screens, allow the addresselectrodes to cover second sustain electrodes Yn and Yn+1 to which theaddress discharge has to certainly performed, however, not to cross overthe first sustain electrodes Xn and Xn+1 to which no discharge begenerated from the address electrodes A. Thus, the clearance D betweenaddress electrodes A1 & A2 is adequately wide to keep address electrodeAn & An+1 away from the second sustain electrode Yn+1 & Yn of theopposite partial screen. Therefore, in PDP of the present invention morehardly takes place the erroneous discharge occurs less frequently thanin the prior art PDP, that is, there is no interference between twopartial screens.

A typical driving method of PDP 1 is hereinafter described. FIG. 6schematically illustrates waveforms of the applied voltages. A singlefield corresponds to a single frame. However, in reproducing a screen,i.e. a scene, scanned by an interface format, such as of a television,two fields are used in displaying a single screen.

In order to achieve a gradation display, a single field is divided intoa plurality, for example six to eight, a sub-fields. Each sub-fieldcontains a reset period TR, an address period TA and a sustain periodTS. Quantity of lightings in the sustain period TS is predetermined soas to appropriately weight the brightness. Accordingly, each sub-fieldcorresponds to a display period of a certain gradation level.

Reset period TR is such that in order to be free from an influence ofthe previous lighting state the wall charges in the first and secondpartial screen E11 and E12 are all erased; i.e. an entire erasing isperformed. A writing pulse PW is applied to all of first sustainelectrodes X, and concurrently a pulse Paw having the same polarity asthe first sustain electrodes X is applied to all of first and secondpartial address electrodes A1 & A2. In response to the rise of thewriting pulse strong surface discharges take place at all the lines soas to once accumulate the wall charges on dielectric layer 17. However,in response to the fall of the writing pulse a so-called self-dischargeby the wall discharges takes place whereby the wall charges on thedielectric layer 17 disappear. The pulse Paw is in order to suppress adischarge between the address electrodes A and the first sustainelectrodes X, accordingly, to suppress an accumulation of wall chargeson the back glass substrate.

Address period TA is a period during which a line-sequential addressingoperation is performed. First sustain electrodes X are applied with apotential Vax positive with respect to the earth potential, for example50 V. All the second sustain electrodes Y are applied with a negativepotential Vsc with respect to the earth potential, for instance −70V.

Under such a condition, each line in each partial screen E11 & E12 issequentially selected one by one, for example, beginning from each topline by applying thereto a scanning pulse Py of the negative polarity,for instance, −170V.

Concurrent to the selection of the line, an address pulse Pa of positivepolarity having a peak value Va, for instance, 60V, is applied tospecific first & second partial address electrode A1 & A2, associatedwith a display cell to be lit, respectively. At the display cell on theselected line, and to which address pulse Pa is applied, an addressdischarge takes place between second sustain electrode Y and first andsecond partial address electrodes A1 or A2. No discharge takes placebetween first sustain electrode X and first or second partial addresselectrodes A1 or A2 because thus selected first sustain electrode X isapplied with a potential Vax having the polarity of the address pulse Paso as to keep the potential difference between the first sustainelectrode X and address electrode A lower than the discharge firingvoltage therebetween.

In consideration of avoiding an interference of the discharges betweenthe lines it is preferable to deviate the timing to select the top line,the n+1 th line, of the second screen E12 from the moment to select thelast line, the n-th line, of the first screen E11.

Sustain period TS is a period during which the quantity of times for acell to light set in the addressing period is reproduced so as toachieve thus set brightness gradation level.

In order to prevent an erroneous opposing discharge, i.e. a dischargeacross the discharge space, all address electrodes A are applied with apositive potential of, for instance, +Vs/2, and at the beginning asustain pulse Ps of positive polarity having a peak value Vs, forexample 195 V, which is higher than the surface discharge firing voltagebetween first and second sustain electrodes X and Y in consideration ofthe effect of the wall charges is applied to all second sustainelectrodes Y.

Subsequently, the sustain pulse Ps is applied alternately onto firstsustain electrodes X and second sustain electrodes Y. Upon eachapplication of sustain pulse Ps, the surface discharges take place inthe cells that have accumulated the wall charge during address periodTA.

A second preferred embodiment of the present invention is hereinafterdescribed with reference to FIG. 7 schematically illustrating across-sectional cut view of a PDP 2 wherein functional elements havingthe same function as FIG. 5 are denoted with the same numerals.

Feature of the structure of PDP 2 is in that a line separator wall 35 isprovided on border line DL of first partial screen E11 and secondpartial screen E12. Line separator wall 35 extends as long as the entirelength of the lines of the display screen E1, and divides dischargespace 30 into two along the row direction. Line separator wall 35prevents the interference of the discharges between first partial screenE11 and second partial screen E12. Line separator wall 35 is fabricatedconcurrently to at the time when separator wall 29, to determine eachsub-pixel shown in FIG. 6 2, is fabricated. Line separator wall 35 hasnot always to contact the inner surface of front glass substrate. Thatis, even if there is a gap between line separator wall 35 and the innersurface of front the front glass substrate, the interference issuppressed. This is because a surface distance between first partialaddress electrodes A1 and second partial address electrodes A2 isincreased by the provision of line separator wall 35, that is, theelectrode distance is effectively elongated.

As a modification of the above preferred embodiments, first and secondpartial address electrodes A1 and A2 may be arranged so as to cross overonly metal film 42 of second sustain electrodes Yn & Yn+1 nearest toborder line DL. In this arrangement, clearance D between first andsecond partial address electrodes A1 and A2 becomes further longer.

Thus, according to the present invention the interference betweenadjacent partial screens can be prevented.

The many features and advantages of the invention are apparent from thedetailed specification and thus, it is intended by the appended claimsto cover all such features and advantages of the methods which fallwithin the true spirit and scope of the invention. Further, sincenumerous modifications and changes will readily occur to those skilledin the art, it is not detailed to limit the invention and accordingly,all suitable modifications and equivalents may be resorted to, fallingwithin the scope of the invention.

1. A surface-discharge type plasma display panel of a matrix displayformation of lines and rows, the plasma display panel including: aplurality of main electrode pairs formed of first and second sustainelectrodes arranged on a first substrate, each extending along a linedirection, the first and second sustain electrodes being in parallel andadjacent to each other; a plurality of address electrodes arranged on asecond substrate opposing the first substrate via a discharge space,each extending along a row direction, a matrix corresponding to a screento be displayed being formed with said main electrodes and addresselectrodes, said address electrodes crossing over said main electrodes,each of said address electrodes being divided into at least two partialaddress electrodes separated from each other by a border line locatedbetween adjacent main electrode pairs, whereby said screen is dividedinto partial screens, a first clearance between said partial addresselectrodes being substantially larger than a second clearance betweensaid main electrode pair adjacent to and across said border line, suchthat one of said address electrodes in said plurality of addresselectrodes is located on an opposite side of said partial screen,substantially distant from said second sustain electrode.
 2. A surfacedischarge type plasma display panel as recited in claim 1, anarrangement of said first and second sustain electrodes is such thatfirst sustain electrodes of said first and second partial screens faceeach other across said border line, and said partial address electrodesdo not cross over said first sustain electrodes nearest to each otheracross said border line when looked in a horizontal view.
 3. A surfacedischarge type plasma display panel as recited in claim 2, anarrangement order, along the row direction, of said first and secondsustain electrodes is reverse each other in said first and secondpartial screens.
 4. A surface discharge type plasma display panel asrecited in claim 3, said address electrodes of one of said partialscreens being led out to a first side of said second substrate at an endof said row, and other address electrodes of another of said partialscreens being led out to a second side opposite from said first side ofsaid second substrate.
 5. A surface discharge type plasma display panelas recited in claim 1, wherein said first sustain electrodes are led outto a first side of said first glass substrate at an end of said line,and said second sustain electrodes are led out to a second side oppositefrom said first side of said first glass substrate at another end oflines.
 6. A surface discharge type plasma display panel as recited inclaim 1, further comprising a separator wall between said first andsecond partial address electrodes respectively of said first and secondpartial screens so as to effectively elongate an effective distancebetween said first and second partial address electrodes across saidborder line.
 7. A surface-discharge type plasma display panel accordingto claim 1, wherein the first clearance across the border line betweensaid partial address electrodes on opposite sides thereof issubstantially larger than a sum of twice the width of said first sustainelectrode adjacent to the border line and a second clearance across theborder line between said first sustain electrode pair adjacent to theborder line, and shorter than a sum of twice the width of said firstsustain electrode adjacent to the border line, a second clearance acrossthe border line between said first sustain electrode pair adjacent tothe border line and twice of a third clearance between the paired firstand second sustain electrodes.
 8. A surface-discharge type plasmadisplay panel according to claim 1, wherein when perpendicularlyprojecting the first substrate onto the second substrate, each of firstends of said partial address electrodes opposing the border line isdisposed between the paired first and second sustain electrodes of saidmain electrode adjacent to the border line.
 9. A surface-discharge typeplasma display panel according to claim 1, wherein said partial screensare symmetrical to each other in relation to said sustain electrodeswith respect to the border line.
 10. A surface-discharge type plasmadisplay panel according to claim 1, wherein each of said first sustainelectrodes adjacent to the border line on opposite sides thereof isexcluded from being crossed over by said corresponding partial addresselectrode.
 11. A surface-discharge type plasma display panel of a matrixdisplay formation of lines and rows, the plasma display panel,comprising: a plurality of main electrode pairs, each pair formed offirst and second sustain electrodes arranged on a first substrate andextending along a line direction, the first and second sustainelectrodes being in parallel and adjacent to each other; and a pluralityof address electrodes arranged on a second substrate opposing the firstsubstrate via a discharge space, each extending along a row direction, amatrix corresponding to a screen to be displayed being formed with saidmain electrodes and said address electrodes, said address electrodescrossing over said main electrodes, each of said address electrodesbeing divided into at least first and second partial address electrodesseparated from each other by a border line located between adjacent mainelectrode pairs, whereby said screen is divided into corresponding, atleast first and second partial screens, a first clearance betweenrespective ends of said at least first and second partial addresselectrodes being substantially larger than a second clearance betweensaid adjacent main electrode pairs with said border line therebetween,such that an end of each of said first and second partial addresselectrodes, adjacent the border line and of one of said first and secondpartial screens is located at a distance from a sustain electrode of themain electrode pair adjacent the border line of the other of said firstand second partial screens so as to prevent a discharge betweenrespective electrodes of the first and second partial screens.
 12. Asurface-discharge type plasma display panel as recited in claim 11 ,wherein a discharge is prevented between the partial address electrodein the one of the first and second partial screens and a sustainelectrode in the other of the first and second partial screens.